1. Field of the Invention
The present invention relates to a semiconductor device having a lead-on-chip (LOC) structure with leads extending over a surface of a semiconductor chip and relates to a method for producing it. The present invention also relates to a leadframe for use in such a device or in production of such a device.
2. Description of the Related Art
FIG. 35 is a cross sectional view of a conventional semiconductor device having a lead-on-chip structure (hereafter referred to as LOC-structure). Such a device is disclosed, for example in Japanese Patent Application Laid-Open No.2-45969. As shown in FIG. 35 the device comprises a die pad 1, a semiconductor chip 2, and a plurality of leads 3 extending toward the semiconductor chip from its both sides, each of the plurality of leads 3 comprising an inner lead portion 3a and an outer lead portion 3b. The device further comprises thin metal wires 5, molding resin 6, and a plurality of electrodes 4 along both sides of a primary surface of the semiconductor chip 2.
An integrated circuit (not shown) and electrodes 4 are formed by photolithography or the like on the upper primary surface of the semiconductor chip 2. The semiconductor chip 2 is fixed on the die pad 1 by bonding the back primary surface of the semiconductor chip 2 to the die pad 1 with a conductive adhesive such as a conductive resin. The inner lead portions 3a are each electrically connected to the electrodes 4 on the semiconductor chip 2 via the thin metal wires 5. These elements described above are sealed with molding resin 6 except for the outer lead portions 3b so that each outer lead portion 3b of leads 3 is exposed to the outside. The outer lead portions 3b of the leads 3 are each formed into a desired shape such as a straight type, gull wing type, J-type etc.
Japanese Patent Application Laid-Open No.2-45969 also discloses a method for producing such a device described above. In accordance with this method, two frames are used: a first frame comprising an outer frame and a die pad disposed inside the outer frame, the die pad being connected to the outer frame via a suspending lead; and a second frame comprising an outer frame and a plurality of leads extending inward from the outer frame. The die pad of the first frame is sunk (depressed) downward by an amount larger than the thickness of the semiconductor chip. After a semiconductor chip is die-bonded on the die pad of the first frame, the second frame is connected to the first frame so that each lead extends over the semiconductor chip with a predetermined constant spacing between each lead and the upper surface of the chip. Then, wire-bonding and resin-molding are performed. The unnecessary portions of frames such as outer frames are removed to obtain a separate semiconductor device. Finally, each outer lead portion of the leads is bent; thus a completed semiconductor device is obtained.
In a conventional semiconductor device with the LOC-structure described above, a semiconductor chip is die-bonded onto a die pad with a conductive resin or the like. However, resin materials exhibit moisture absorption, thus moisture absorbed in resin may cause degradation in the adhesive strength, and/or may corrode the semiconductor chip or leads in contact with the resin. To mount a semiconductor device on a circuit board or the like, the semiconductor device is put on the circuit board, then the circuit board with the chip are placed in a hot environment to heat it. Thus, the outer lead portions are soldered to the circuit board. The moisture absorbed in the die-bonding resin confined in the molding resin is evaporated during the soldering process, which may result in separation of the semiconductor chip from the die pad, and/or result in cracks in a package.
In the conventional production method using two frames described above, the outer parts of two frames remain connected to each other until the molding process is completed. As a result, these outer frames act as obstacles, and difficulty occurs in handling. Therefore, during the succeeding processes after the two frames are connected, failures often occur in transferring frames, and/or liquid used for processing penetrates between the outer frames, leaking later to cause contamination. In particular, in the case of a production process including a step for plating the outer lead portions of the semiconductor device before separating the semiconductor device from the frames, serious problems occur because plating solution can penetrate between two outer frames and may leak some time later.
In another method known in the art, a single frame is used to produce a semiconductor device having LOC-structure, the single frame comprising a die pad and leads formed in an integral fashion. In such a type of leadframe, a die pad is disposed between the leads extending from both sides of the leadframe, and the die pad extends in the directions perpendicular to these leads. However, the width of the die pad cannot be enlarged to exceed the lead area. As a result, only narrow die pads are available. Japanese Patent Application Laid-Open No.64-69041 discloses a leadframe having a die pad with a large width extending beyond the area of the leads. In this case, however, the length of leads, in turn, should be shortened, or otherwise, the leads may be deformed. As a result, longer thin metal wires are required for wire-bonding and/or the choice of locations of the electrodes on the semiconductor chip is limited.
In the case where a semiconductor device is produced using a leadframe having a die pad as well as leads formed in an integral fashion, the die pad is sunk by the amount corresponding to the thickness of a semiconductor chip, and the semiconductor chip is inserted between the leads and the die pad, then the semiconductor chip is die-bonded on the die pad. However, in the case where the die pad extends perpendicular to the direction in which the leadframe is transferred during the production processes of the semiconductor device, the semiconductor chip must be inserted between the leads and the sunk die pad in the same direction as that of the leadframe-transfer path. This insertion process is difficult to perform, and complicated and troublesome operations are required. Furthermore, it also requires complicated and troublesome operations to die-bond a semiconductor chip onto the die pad with hard solder after the semiconductor chip is inserted. There are such problems in conventional semiconductor devices and methods for producing them.